Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.2 (ISE) - P.28xd Target Family: Spartan6
OS Platform: NT Target Device: xc6slx75
Project ID (random number) 3a87d6e8712240c59d519cb854c70688.1B11E7EF234E4C9399DA62B17740E9CC.3 Target Package: fgg676
Registration ID 176541620_203016857_209847568_344 Target Speed: -3
Date Generated 2012-10-04T10:15:49 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 32-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz CPU Speed 3099 MHz
OS Name Microsoft Windows 7 , 32-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz CPU Speed 3099 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Counters=3
  • 16-bit up counter=1
  • 22-bit up counter=1
  • 4-bit up counter=1
Multiplexers=1
  • 8-bit 2-to-1 multiplexer=1
Registers=38
  • Flip-Flops=38
MiscellaneousStatistics
  • AGG_BONDED_IO=31
  • AGG_IO=31
  • AGG_LOCED_IO=31
  • AGG_SLICE=21
  • NUM_BONDED_IOB=31
  • NUM_BSFULL=48
  • NUM_BSLUTONLY=11
  • NUM_BSUSED=59
  • NUM_BUFG=1
  • NUM_ILOGIC2=8
  • NUM_IOB_FF=8
  • NUM_LOCED_IOB=31
  • NUM_LOGIC_O5ANDO6=42
  • NUM_LOGIC_O6ONLY=17
  • NUM_SLICEL=11
  • NUM_SLICEX=10
  • NUM_SLICE_CARRY4=10
  • NUM_SLICE_CONTROLSET=6
  • NUM_SLICE_CYINIT=101
  • NUM_SLICE_F7MUX=1
  • NUM_SLICE_FF=51
  • NUM_SLICE_UNUSEDCTRL=5
  • NUM_UNUSABLE_FF_BELS=21
NetStatistics
  • NumNets_Active=129
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEIN=16
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=16
  • NumNodesOfType_Active_CLKPINFEED=3
  • NumNodesOfType_Active_CNTRLPIN=43
  • NumNodesOfType_Active_DOUBLE=131
  • NumNodesOfType_Active_GENERIC=68
  • NumNodesOfType_Active_GLOBAL=25
  • NumNodesOfType_Active_INPUT=9
  • NumNodesOfType_Active_IOBIN2OUT=62
  • NumNodesOfType_Active_IOBOUTPUT=56
  • NumNodesOfType_Active_LUTINPUT=268
  • NumNodesOfType_Active_OUTBOUND=95
  • NumNodesOfType_Active_OUTPUT=77
  • NumNodesOfType_Active_PADINPUT=41
  • NumNodesOfType_Active_PADOUTPUT=14
  • NumNodesOfType_Active_PINBOUNCE=66
  • NumNodesOfType_Active_PINFEED=368
  • NumNodesOfType_Active_PINFEED2=8
  • NumNodesOfType_Active_QUAD=311
  • NumNodesOfType_Active_REGINPUT=4
  • NumNodesOfType_Active_SINGLE=147
  • NumNodesOfType_Vcc_HVCCOUT=13
  • NumNodesOfType_Vcc_LUTINPUT=42
  • NumNodesOfType_Vcc_PINFEED=42
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=16
  • IOB-IOBS=15
  • IOB-UNPLACED=1
  • SLICEL-SLICEM=10
  • SLICEX-SLICEL=1
  • SLICEX-SLICEM=1
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=10
  • FF_SR=3
  • HARD0=8
  • ILOGIC2=8
  • ILOGIC2_IFF=8
  • INVERTER=9
  • IOB=32
  • IOB_IMUX=15
  • IOB_INBUF=15
  • IOB_OUTBUF=26
  • LUT5=42
  • LUT6=59
  • PAD=32
  • PULL_OR_KEEP1=1
  • REG_SR=48
  • SELMUX2_1=11
  • SLICEL=11
  • SLICEX=10
 
Configuration Data
FF_SR
  • CK=[CK:3] [CK_INV:0]
  • SRINIT=[SRINIT0:3]
  • SYNC_ATTR=[ASYNC:3]
ILOGIC2
  • CLK0=[CLK0_INV:0] [CLK0:8]
ILOGIC2_IFF
  • CLK0=[CLK0_INV:0] [CLK0:8]
  • IFFTYPE=[FF:8]
  • SRINIT_Q=[1:8]
  • SRTYPE_Q=[ASYNC:8]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:26]
  • SLEW=[SLOW:10] [FAST:16]
  • SUSPEND=[3STATE:25]
PULL_OR_KEEP1
  • PULLTYPE=[PULLUP:1]
REG_SR
  • CK=[CK:48] [CK_INV:0]
  • LATCH_OR_FF=[FF:48]
  • SRINIT=[SRINIT0:48]
  • SYNC_ATTR=[ASYNC:48]
SLICEL
  • CLK=[CLK:11] [CLK_INV:0]
SLICEX
  • CLK=[CLK:5] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=8
  • CO3=8
  • CYINIT=2
  • DI0=10
  • DI1=9
  • DI2=9
  • DI3=8
  • O0=10
  • O1=10
  • O2=9
  • O3=9
  • S0=10
  • S1=10
  • S2=9
  • S3=9
FF_SR
  • CE=1
  • CK=3
  • D=3
  • Q=3
  • SR=3
HARD0
  • 0=8
ILOGIC2
  • CE0=8
  • CLK0=8
  • D=8
  • FABRICOUT=2
  • Q4=8
  • SR=8
ILOGIC2_IFF
  • CE0=8
  • CLK0=8
  • D=8
  • Q1=8
  • SR=8
INVERTER
  • IN=9
  • OUT=9
IOB
  • I=14
  • O=25
  • PAD=31
  • T=16
IOB_IMUX
  • I=6
  • I_B=9
  • OUT=15
IOB_INBUF
  • OUT=15
  • PAD=15
IOB_OUTBUF
  • IN=26
  • OUT=26
  • TRI=17
LUT5
  • A1=2
  • A2=6
  • A3=6
  • A4=3
  • A5=5
  • O5=42
LUT6
  • A1=24
  • A2=50
  • A3=56
  • A4=58
  • A5=58
  • A6=59
  • O6=59
PAD
  • PAD=32
PULL_OR_KEEP1
  • PAD=1
REG_SR
  • CE=42
  • CK=48
  • D=48
  • Q=48
  • SR=46
SELMUX2_1
  • 0=11
  • 1=1
  • OUT=11
  • S0=11
SLICEL
  • A=1
  • A1=4
  • A2=10
  • A3=11
  • A4=11
  • A5=11
  • A6=11
  • AQ=10
  • AX=2
  • B=1
  • B1=4
  • B2=10
  • B3=11
  • B4=11
  • B5=11
  • B6=11
  • BMUX=1
  • BQ=10
  • C1=5
  • C2=10
  • C3=10
  • C4=10
  • C5=10
  • C6=10
  • CE=11
  • CIN=8
  • CLK=11
  • COUT=8
  • CQ=10
  • CX=1
  • D1=4
  • D2=10
  • D3=10
  • D4=10
  • D5=10
  • D6=10
  • DQ=9
  • SR=11
SLICEX
  • A=1
  • A1=4
  • A2=5
  • A3=6
  • A4=6
  • A5=6
  • A6=6
  • AMUX=2
  • AQ=5
  • B=1
  • B1=2
  • B2=3
  • B3=3
  • B4=3
  • B5=3
  • B6=3
  • BMUX=1
  • BQ=3
  • BX=1
  • C=3
  • C1=2
  • C2=3
  • C3=4
  • C4=4
  • C5=4
  • C6=4
  • CE=1
  • CLK=5
  • CQ=1
  • D=4
  • D2=2
  • D3=2
  • D4=3
  • D5=3
  • D6=4
  • DMUX=2
  • SR=4
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -uc <fname>.ucf -p xc6slx75-fgg676-3 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -uc <fname>.ucf -p xc6slx75-fgg676-3 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -uc <fname>.ucf -p xc6slx75-fgg676-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx75-fgg676-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -uc <fname>.ucf -p xc6slx75-fgg676-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx75-fgg676-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -aul -nt timestamp -uc <fname>.ucf -uc <fname>.ucf -uc <fname>.ucf -p xc6slx75-fgg676-3 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx75-fgg676-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr b -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 2 1 0 0 0 0 0
bitgen 50 50 0 0 0 0 0
map 57 56 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngcbuild 13 13 0 0 0 0 0
ngdbuild 68 68 0 0 0 0 0
par 56 55 0 0 0 0 0
trce 53 53 0 0 0 0 0
xst 96 96 0 0 0 0 0
 
Project Statistics
PROPEXT_xilxMapPackRegInto_spartan6=For Inputs and Outputs PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2012-10-02T16:26:54 PROP_intWbtProjectID=1B11E7EF234E4C9399DA62B17740E9CC
PROP_intWbtProjectIteration=3 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_xilxBitgCfg_Rate_spartan6=26
PROP_xilxBitgCfg_Unused=Float PROP_xilxBitgStart_IntDone=true
PROP_xilxBitgSusWake_DriveAwakePin_spartan6=true PROP_xilxBitgSusWake_WakeupClk_spartan6=Internal Clock
PROP_xilxNgdbld_AUL=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_xilxBitgCfg_GenOpt_BinaryFile=true
PROP_DevDevice=xc6slx75 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=fgg676 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-3 PROP_PreferredLanguage=Verilog
FILE_UCF=3 FILE_VERILOG=4
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=2 NGDBUILD_NUM_FDC=6 NGDBUILD_NUM_FDCE=43
NGDBUILD_NUM_FDPE=8 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=5 NGDBUILD_NUM_INV=10
NGDBUILD_NUM_IOBUF=8 NGDBUILD_NUM_LUT2=1 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=31
NGDBUILD_NUM_LUT5=19 NGDBUILD_NUM_LUT6=8 NGDBUILD_NUM_MUXCY=36 NGDBUILD_NUM_MUXF7=1
NGDBUILD_NUM_OBUF=9 NGDBUILD_NUM_OBUFT=8 NGDBUILD_NUM_XORCY=38
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=2 NGDBUILD_NUM_FDC=6 NGDBUILD_NUM_FDCE=43
NGDBUILD_NUM_FDPE=8 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=13 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_INV=10 NGDBUILD_NUM_LUT2=1 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=31
NGDBUILD_NUM_LUT5=19 NGDBUILD_NUM_LUT6=8 NGDBUILD_NUM_MUXCY=36 NGDBUILD_NUM_MUXF7=1
NGDBUILD_NUM_OBUF=9 NGDBUILD_NUM_OBUFT=16 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_XORCY=38
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx75-3-fgg676
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5