Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 

 
Software Version and Target Device
Product Version: ISE:11.3 (ISE) Target Family: spartan3a
OS Platform: NT Target Device: xc3s1400an
Project ID (random number) 3f752818644440c9b9527760ee44305a.602f994abb54471cbd63c280a6204a73.2 Target Package: fgg676
Registration ID 176541620_0_0 Target Speed: -4
Date Generated 火 10 6 15:35:38 2009
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Counters=3
  • 16-bit up counter=1
  • 22-bit up counter=1
  • 4-bit up counter=1
Registers=30
  • Flip-Flops=30
MiscellaneousStatistics
  • AGG_BONDED_IO=34
  • AGG_IO=34
  • AGG_SLICE=34
  • NUM_4_INPUT_LUT=62
  • NUM_BONDED_IBUF=6
  • NUM_BONDED_IOB=28
  • NUM_BUFGMUX=1
  • NUM_CYMUX=41
  • NUM_IOB_FF=8
  • NUM_SLICEL=34
  • NUM_SLICE_FF=51
  • NUM_XOR=38
NetStatistics
  • NumNets_Active=131
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=37
  • NumNodesOfType_Active_CNTRLPIN=84
  • NumNodesOfType_Active_DOUBLE=317
  • NumNodesOfType_Active_DUMMY=184
  • NumNodesOfType_Active_DUMMYESC=14
  • NumNodesOfType_Active_GLOBAL=13
  • NumNodesOfType_Active_HUNIHEX=16
  • NumNodesOfType_Active_INPUT=232
  • NumNodesOfType_Active_IOBOUTPUT=14
  • NumNodesOfType_Active_OMUX=92
  • NumNodesOfType_Active_OUTPUT=83
  • NumNodesOfType_Active_PREBXBY=47
  • NumNodesOfType_Active_VFULLHEX=13
  • NumNodesOfType_Active_VLONG=3
  • NumNodesOfType_Active_VUNIHEX=38
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_INPUT=1
  • NumNodesOfType_Vcc_PREBXBY=1
  • NumNodesOfType_Vcc_VCCOUT=2
SiteStatistics
  • IBUF-DIFFMLR=4
  • IBUF-DIFFSI_NDT=1
  • IBUF-DIFFSLR=1
  • IOB-DIFFMLR=12
  • IOB-DIFFSLR=16
  • SLICEL-SLICEM=9
SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IBUF=6
  • IBUF_DELAY_ADJ_BBOX=6
  • IBUF_INBUF=6
  • IBUF_PAD=6
  • IOB=28
  • IOB_DELAY_ADJ_BBOX=8
  • IOB_INBUF=8
  • IOB_OFF1=8
  • IOB_OUTBUF=28
  • IOB_PAD=28
  • SLICEL=34
  • SLICEL_CYMUXF=22
  • SLICEL_CYMUXG=19
  • SLICEL_F=31
  • SLICEL_FFX=25
  • SLICEL_FFY=26
  • SLICEL_G=31
  • SLICEL_GNDF=22
  • SLICEL_GNDG=19
  • SLICEL_XORF=19
  • SLICEL_XORG=19
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:6]
  • IBUF_DELAY_VALUE=[DLY0:6]
  • IFD_DELAY_VALUE=[DLY0:6]
  • SEL_IN=[SEL_IN:6] [SEL_IN_INV:0]
IBUF_PAD
  • IOATTRBOX=[LVTTL:6]
IOB
  • O1=[O1_INV:8] [O1:20]
  • OCE=[OCE:8] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:8]
  • SR=[SR:0] [SR_INV:8]
  • T1=[T1_INV:16] [T1:0]
IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:8]
  • IBUF_DELAY_VALUE=[DLY0:8]
  • IFD_DELAY_VALUE=[DLY0:8]
  • SEL_IN=[SEL_IN:8] [SEL_IN_INV:0]
IOB_OFF1
  • CE=[CE:8] [CE_INV:0]
  • CK=[CK:8] [CK_INV:0]
  • D=[D:0] [D_INV:8]
  • LATCH_OR_FF=[FF:8]
  • OFF1_INIT_ATTR=[INIT1:8]
  • OFF1_SR_ATTR=[SRHIGH:8]
  • OFFATTRBOX=[ASYNC:8]
  • SR=[SR:0] [SR_INV:8]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:28]
  • SUSPEND=[3STATE:28]
  • TRI=[TRI_INV:16] [TRI:0]
IOB_PAD
  • DRIVEATTRBOX=[12:28]
  • IOATTRBOX=[LVTTL:25] [LVCMOS25:3]
  • SLEW=[SLOW:28]
SLICEL
  • BX=[BX_INV:0] [BX:5]
  • BY=[BY:2] [BY_INV:0]
  • CE=[CE:24] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:19]
  • CLK=[CLK:29] [CLK_INV:0]
  • SR=[SR:0] [SR_INV:28]
SLICEL_CYMUXF
  • 0=[0:22] [0_INV:0]
  • 1=[1_INV:0] [1:22]
SLICEL_CYMUXG
  • 0=[0:19] [0_INV:0]
SLICEL_FFX
  • CE=[CE:22] [CE_INV:0]
  • CK=[CK:25] [CK_INV:0]
  • D=[D:25] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:25]
  • FFX_SR_ATTR=[SRLOW:25]
  • LATCH_OR_FF=[FF:25]
  • SR=[SR:0] [SR_INV:24]
  • SYNC_ATTR=[ASYNC:25]
SLICEL_FFY
  • CE=[CE:22] [CE_INV:0]
  • CK=[CK:26] [CK_INV:0]
  • D=[D:26] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:26]
  • FFY_SR_ATTR=[SRLOW:26]
  • LATCH_OR_FF=[FF:26]
  • SR=[SR:0] [SR_INV:25]
  • SYNC_ATTR=[ASYNC:26]
SLICEL_XORF
  • 1=[1_INV:0] [1:19]
 
Pin Data
BUFGMUX
  • I0=1
  • O=1
  • S=1
BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
IBUF
  • I=6
  • PAD=6
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=6
  • SEL_IN=6
IBUF_INBUF
  • IN=6
  • OUT=6
IBUF_PAD
  • PAD=6
IOB
  • I=8
  • O1=28
  • OCE=8
  • OTCLK1=8
  • PAD=28
  • SR=8
  • T1=16
IOB_DELAY_ADJ_BBOX
  • IBUF_OUT=8
  • SEL_IN=8
IOB_INBUF
  • IN=8
  • OUT=8
IOB_OFF1
  • CE=8
  • CK=8
  • D=8
  • Q=8
  • SR=8
IOB_OUTBUF
  • IN=28
  • OUT=28
  • TRI=16
IOB_PAD
  • PAD=28
SLICEL
  • BX=5
  • BY=2
  • CE=24
  • CIN=19
  • CLK=29
  • COUT=19
  • F1=31
  • F2=31
  • F3=15
  • F4=12
  • G1=31
  • G2=31
  • G3=15
  • G4=12
  • SR=28
  • X=5
  • XB=1
  • XQ=25
  • Y=6
  • YQ=26
SLICEL_CYMUXF
  • 0=22
  • 1=22
  • OUT=22
  • S0=22
SLICEL_CYMUXG
  • 0=19
  • 1=19
  • OUT=19
  • S0=19
SLICEL_F
  • A1=31
  • A2=31
  • A3=15
  • A4=12
  • D=31
SLICEL_FFX
  • CE=22
  • CK=25
  • D=25
  • Q=25
  • SR=24
SLICEL_FFY
  • CE=22
  • CK=26
  • D=26
  • Q=26
  • SR=25
SLICEL_G
  • A1=31
  • A2=31
  • A3=15
  • A4=12
  • D=31
SLICEL_GNDF
  • 0=22
SLICEL_GNDG
  • 0=19
SLICEL_XORF
  • 0=19
  • 1=19
  • O=19
SLICEL_XORG
  • 0=19
  • 1=19
  • O=19
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1400an-fgg676-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1400an-fgg676-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1400an-fgg676-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1400an-fgg676-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1400an-fgg676-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
bitgen 3 3 0 0 0 0 0
map 4 4 0 0 0 0 0
ngdbuild 10 10 0 0 0 0 0
par 4 4 0 0 0 0 0
trce 4 4 0 0 0 0 0
xst 3 3 0 0 0 0 0
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISim (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_UCF=1 FILE_VERILOG=4
PROP_DevDevice=xc3s1400an PROP_DevFamily=Spartan3A and Spartan3AN
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_Simulator=ISim (VHDL/Verilog) PROP_UserConstraintEditorPreference=Constraints Editor
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgCfg_GenOpt_BinaryFile=true Project duration(days)=0