Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
qsys1|width_adapter_003|uncompressor |
45 |
1 |
0 |
1 |
39 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|width_adapter_003 |
72 |
4 |
0 |
4 |
97 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
qsys1|width_adapter_002 |
99 |
0 |
0 |
0 |
70 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|width_adapter_001|uncompressor |
45 |
1 |
0 |
1 |
39 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|width_adapter_001 |
81 |
4 |
0 |
4 |
97 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
qsys1|width_adapter |
99 |
0 |
0 |
0 |
79 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_mux|arb|adder |
24 |
12 |
0 |
12 |
12 |
12 |
12 |
12 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_mux|arb |
10 |
0 |
4 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_mux |
579 |
0 |
0 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux_005 |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux_004 |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux_003 |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux_002 |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux_001 |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|rsp_xbar_demux |
99 |
1 |
2 |
1 |
97 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|cmd_xbar_demux |
104 |
36 |
2 |
36 |
577 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
qsys1|rst_controller|alt_rst_sync_uq1 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|rst_controller |
17 |
15 |
0 |
15 |
1 |
15 |
15 |
15 |
0 |
0 |
0 |
0 |
0 |
qsys1|burst_adapter_001|altera_merlin_burst_adapter_uncompressed_only.the_ba |
81 |
3 |
5 |
3 |
79 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|burst_adapter_001 |
81 |
0 |
0 |
0 |
79 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|burst_adapter|altera_merlin_burst_adapter_uncompressed_only.the_ba |
72 |
3 |
5 |
3 |
70 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|burst_adapter |
72 |
0 |
0 |
0 |
70 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_005|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_005 |
66 |
0 |
2 |
0 |
70 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_004|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_004 |
75 |
0 |
2 |
0 |
79 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_003|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_003 |
93 |
0 |
2 |
0 |
97 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_002|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_002 |
93 |
0 |
2 |
0 |
97 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_001|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router_001 |
93 |
0 |
2 |
0 |
97 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|id_router |
93 |
0 |
2 |
0 |
97 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|addr_router|the_default_decode |
0 |
9 |
0 |
9 |
9 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
qsys1|addr_router |
93 |
0 |
5 |
0 |
97 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|led_s1_translator_avalon_universal_slave_0_agent_rsp_fifo |
133 |
39 |
0 |
39 |
92 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|led_s1_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|led_s1_translator_avalon_universal_slave_0_agent |
259 |
32 |
39 |
32 |
292 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0_s1_translator_avalon_universal_slave_0_agent_rsp_fifo |
115 |
39 |
0 |
39 |
74 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0_s1_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0_s1_translator_avalon_universal_slave_0_agent |
191 |
16 |
23 |
16 |
221 |
16 |
16 |
16 |
0 |
0 |
0 |
0 |
0 |
qsys1|pio_0_s1_translator_avalon_universal_slave_0_agent_rsp_fifo |
133 |
39 |
0 |
39 |
92 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|pio_0_s1_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|pio_0_s1_translator_avalon_universal_slave_0_agent |
259 |
32 |
39 |
32 |
292 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
qsys1|sram_avalon_slave_0_translator_avalon_universal_slave_0_agent_rsp_fifo |
106 |
39 |
0 |
39 |
65 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|sram_avalon_slave_0_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|sram_avalon_slave_0_translator_avalon_universal_slave_0_agent |
157 |
8 |
15 |
8 |
185 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
qsys1|notuse_s1_translator_avalon_universal_slave_0_agent_rsp_fifo |
133 |
39 |
0 |
39 |
92 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|notuse_s1_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|notuse_s1_translator_avalon_universal_slave_0_agent |
259 |
32 |
39 |
32 |
292 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
qsys1|swin_s1_translator_avalon_universal_slave_0_agent_rsp_fifo |
133 |
39 |
0 |
39 |
92 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
qsys1|swin_s1_translator_avalon_universal_slave_0_agent|uncompressor |
45 |
1 |
0 |
1 |
43 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
qsys1|swin_s1_translator_avalon_universal_slave_0_agent |
259 |
32 |
39 |
32 |
292 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0_avalon_master_translator_avalon_universal_master_0_agent |
174 |
16 |
67 |
16 |
125 |
16 |
16 |
16 |
0 |
0 |
0 |
0 |
0 |
qsys1|sram_avalon_slave_0_translator |
59 |
3 |
12 |
3 |
42 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0_s1_translator |
77 |
4 |
17 |
4 |
54 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
qsys1|notuse_s1_translator |
112 |
3 |
33 |
3 |
70 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|led_s1_translator |
112 |
3 |
33 |
3 |
70 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|swin_s1_translator |
112 |
3 |
33 |
3 |
36 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|pio_0_s1_translator |
112 |
3 |
33 |
3 |
70 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0_avalon_master_translator |
113 |
10 |
0 |
10 |
108 |
10 |
10 |
10 |
0 |
0 |
0 |
0 |
0 |
qsys1|sram |
34 |
0 |
1 |
0 |
31 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0|the_altsyncram|auto_generated|mux2 |
66 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0|the_altsyncram|auto_generated|decode3 |
3 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0|the_altsyncram|auto_generated |
36 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|onchip_memory2_0 |
38 |
0 |
1 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|pio_0 |
38 |
0 |
0 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|notuse |
38 |
0 |
0 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|swin |
12 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|led |
38 |
24 |
24 |
24 |
40 |
24 |
24 |
24 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
11 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|usedw_counter |
5 |
0 |
0 |
0 |
11 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|rd_ptr_msb |
4 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|two_comparison |
22 |
11 |
0 |
11 |
1 |
11 |
11 |
11 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|almost_full_comparer |
22 |
11 |
0 |
11 |
1 |
11 |
11 |
11 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo|FIFOram |
42 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated|dpfifo |
21 |
0 |
0 |
0 |
29 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo|scfifo_component|auto_generated |
20 |
0 |
0 |
0 |
29 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|rfifo |
20 |
0 |
0 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|usedw_counter |
5 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|rd_ptr_msb |
4 |
0 |
0 |
0 |
11 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|three_comparison |
24 |
12 |
0 |
12 |
1 |
12 |
12 |
12 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|almost_full_comparer |
24 |
12 |
0 |
12 |
1 |
12 |
12 |
12 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo|FIFOram |
44 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated|dpfifo |
21 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo|scfifo_component|auto_generated |
20 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont|wfifo |
20 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|MemCont |
87 |
2 |
2 |
2 |
84 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0|RegCont |
23 |
18 |
0 |
18 |
133 |
18 |
18 |
18 |
0 |
0 |
0 |
0 |
0 |
qsys1|gpif_master_0 |
41 |
5 |
2 |
5 |
76 |
5 |
5 |
5 |
16 |
0 |
0 |
0 |
0 |
qsys1 |
16 |
5 |
0 |
5 |
37 |
5 |
5 |
5 |
24 |
0 |
0 |
0 |
0 |
pll1|altpll_component|auto_generated |
3 |
0 |
0 |
0 |
6 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
pll1 |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |